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 INTEGRATED CIRCUITS
74ALS646/74ALS646-1 74ALS648/74ALS648-1 Transceiver/register
Product specification IC05 Data Handbook 1991 Feb 08
Philips Semiconductors
Philips Semiconductors
Product specification
Transceiver/register
74ALS646/646-1 74ALS648/648-1
FEATURES
74ALS646/74ALS646-1 74ALS648/74ALS648-1
Octal transceiver/register, non-inverting (3-State) Octal transceiver/register, inverting (3-State)
TYPE 74ALS646/646-1 74ALS648/648-1 TYPICAL fMAX 140MHz 140MHz TYPICAL SUPPLY CURRENT (TOTAL) 48mA 54mA
* Combines
one chip
74ALS245 and two 74ALS374 type functions in
* Independent registers for A and B buses * Multiplexed real-time and stored data * Choice of non-inverting and inverting data paths * 3-State outputs * The -1 version sink 48mA IOL within the 5% VCC range
DESCRIPTION
The 74ALS646/74ALS646-1 and 74ALS648/74ALS648-1 transceivers/registers consist of bus transceiver circuits with 3-State outputs, D-type flip-flops, and control circuitry arranged for multiplexed transmission of data directly from the input bus or the internal registers. Data on the A or B bus will be clocked into the registers as the appropriate clock pin goes High. Output enable (OE) and direction (DIR) and select (SAB, SBA) pins are provided for bus management. The 74ALS646-1 and 74ALS648-1 will sink 48mA if the VCC is limited to 5.0V 0.25V.
ORDERING INFORMATION
ORDER CODE DESCRIPTION COMMERCIAL RANGE VCC = 5V 10%, Tamb = 0C to +70C 74ALS646N, 74ALS646-1N, 74ALS648N, 74ALS648-1N 74ALS646D, 74ALS646-1D, 74ALS648D, 74ALS648-1D DRAWING NUMBER
24-pin plastic DIP 24-pin plastic SOL
SOT222-1 SOT137-1
INPUT AND OUTPUT LOADING AND FAN-OUT TABLE
PINS A0 - A7 B0 - B7 CPAB CPBA SAB SBA DIR OE A0 - A7, B0 - B7 A0 - A7, B0 - B7 A inputs B inputs A-to-B clock input B-to-A clock input A-to-B select input B-to-A select input Data flow directional control input Output enable input Data outputs Data outputs (-1 version) DESCRIPTION 74ALS (U.L.) HIGH/LOW 1.0/1.0 1.0/1.0 1.0/1.0 1.0/1.0 1.0/1.0 1.0/1.0 1.0/1.0 1.0/1.0 750/240 750/480 LOAD VALUE HIGH/LOW 20A/0.1mA 20A/0.1mA 20A/0.1mA 20A/0.1mA 20A/0.1mA 20A/0.1mA 20A/0.1mA 20A/0.1mA 15mA/24mA 15mA/48mA
NOTE: One (1.0) ALS unit load is defined as: 20A in the High state and 0.1mA in the Low state.
1991 Feb 08
2
853-1408 01670
Philips Semiconductors
Product specification
Transceiver/register
74ALS646/74ALS646-1 74ALS648/74ALS648-1
PIN CONFIGURATION - 74ALS646/646-1
CPAB SAB DIR A0 A1 A2 A3 A4 A5 1 2 3 4 5 6 7 8 9 24 VCC 23 CPBA 22 SBA 21 OE 20 B0 19 B1 18 B2 17 B3 16 B4 15 B5 14 B6 13 B7
PIN CONFIGURATION - 74ALS648/648-1
CPAB SAB DIR A0 A1 A2 A3 A4 A5 1 2 3 4 5 6 7 8 9 24 VCC 23 CPBA 22 SBA 21 OE 20 B0 19 B1 18 B2 17 B3 16 B4 15 B5 14 B6 13 B7
A6 10 A7 11 GND 12
A6 10 A7 11 GND 12
SC00118
SC00119
LOGIC SYMBOL - 74ALS646/646-1
4 5 6 7 8 9 10 11
LOGIC SYMBOL - 74ALS648/648-1
4 5 6 7 8 9 10 11
A0 A1 A2 A3 A4 A5 A6 A7 1 2 3 23 22 21 CPAB SAB DIR SPBA SBA OE B0 B1 B2 B3 B4 B5 B6 B7 1 2 3 23 22 21
A0 A1 A2 A3 A4 A5 A6 A7 CPAB SAB DIR SPBA SBA OE B0 B1 B2 B3 B4 B5 B6 B7
VCC = Pin 24 GND = Pin 12
20
19
18
17
16
15
14
13
SC00120
VCC = Pin 24 GND = Pin 12
20
19
18
17
16
15
14
13
SC00121
IEC/IEEE SYMBOL - 74ALS646/646-1
21 3 G3 3 EN1 [BA] 3 EN2 [AB] C4 G5 C6 G7 1 1 6D 5 6 7 8 9 10 11 1 7 7 5 5 1 1 2 19 18 17 16 15 14 13 4D 20
IEC/IEEE SYMBOL - 74ALS648/648-1
21 3 G3 3 EN1 [BA] 3 EN2 [AB] C4 G5 C6 G7 1 1 6D 5 6 7 8 9 10 11 1 7 7 5 5 1 1 2 19 18 17 16 15 14 13 4D 20
23 22 1 2
23 22 1 2
4
4
SC00122
SC00123
1991 Feb 08
3
Philips Semiconductors
Product specification
Transceiver/register
74ALS646/74ALS646-1 74ALS648/74ALS648-1
BUS MANAGEMENT FUNCTIONS
The following examples demonstrate the four fundamental bus-management functions that can be performed with the 74ALS646/646-1 and 74ALS648/648-1. The select pins determine whether data is stored or transferred through the device in real time. The DIR determines which bus will receive data when the OE pin is Low.
REAL TIME BUS TRANSFER BUS B TO BUS A
REAL TIME BUS TRANSFER BUS A TO BUS B
STORAGE FROM A, B, OR A AND B
TRANSFER STORED DATA TO A AND/OR B
BUS A
BUS B
BUS A
BUS B
BUS A
BUS B
BUS A
BUS B
OE DIR CPAB CPBA SAB SBA L L X X X L
OE DIR CPAB CPBA SAB SBA L H X X L X
OE DIR CPAB CPBA SAB SBA X X X X X X X X X X H X X X
OE DIR CPAB CPBA SAB SBA L L X H or L X H L H H or L X H X
SF00392
1991 Feb 08
4
Philips Semiconductors
Product specification
Transceiver/register
74ALS646/74ALS646-1 74ALS648/74ALS648-1
LOGIC SYMBOL - 74ALS646/646-1
OE 21
LOGIC SYMBOL - 74ALS648/648-1
OE 21
3 DIR 23 CPBA 22 SBA 1 CPAB 2 SAB
3 DIR 23 CPBA 22 SBA 1 CPAB 2 SAB
1 OF 8 CHANNELS
1D C1
1 OF 8 CHANNELS
1D C1
A0
4 1D C1
20 B0
A0
4 1D C1
20 B0
VCC = Pin 24 GND = Pin 12
TO 7 OTHER CHANNELS
SC00124
VCC = Pin 24 GND = Pin 12
TO 7 OTHER CHANNELS
SC00125
FUNCTION TABLE
INPUTS OE X X H H L L L L DIR X X X X L L H H CPAB X H or L X X X H or L CPBA X H or L X H or L X X SAB X X X X X X L H SBA X X X X L H X X An Input Unspecified* Input Input Output Output Input Input DATA I/O Bn Unspecified* Input Input Input Input Input Output Output OPERATING MODE 74ALS646/74ALS646-1 Store A, B unspecified* Store B, A unspecified* Store A and B data Isolation, hold storage Real time B data to A bus Stored B data to A bus Real time A data to B bus Stored A data to B bus 74ALS648/74ALS648-1 Store A, B unspecified* Store B, A unspecified* Store A and B data Isolation, hold storage Real time B data to A bus Stored B data to A bus Real time A data to B bus Stored A data to B bus
NOTES: H = High voltage level L = Low voltage level X = Don't care * = The data output function may be enabled or disabled by various signals at the OE and DIR inputs. Data input functions are always enabled, i.e., data at the bus pins will be stored on every Low-to-High transition of the clock. = Low-to-High clock transition
1991 Feb 08
5
Philips Semiconductors
Product specification
Transceiver/register
74ALS646/74ALS646-1 74ALS648/74ALS648-1
ABSOLUTE MAXIMUM RATINGS
(Operation beyond the limit set forth in this table may impair the useful life of the device. Unless otherwise noted these limits are over the operating free-air temperature range.) SYMBOL VCC VIN IIN VOUT IO OUT Tamb Tstg Supply voltage Input voltage Input current Voltage applied to output in High output state All versions Current applied to output in Low output state Operating free-air temperature range Storage temperature range -1 version PARAMETER RATING -0.5 to +7.0 -0.5 to +7.0 -30 to +5 -0.5 to VCC 48 96 0 to +70 -65 to +150 UNIT V V mA V mA mA C C
RECOMMENDED OPERATING CONDITIONS
SYMBOL VCC VIH VIL IIK IOH IO OL Tamb Supply voltage High-level input voltage Low-level input voltage Input clamp current High-level output current All versions Low-level Low level output current Operating free-air temperature range -1 version 0 PARAMETER MIN 4.5 2.0 0.8 -18 -15 24 48 1 +70 LIMITS NOM 5.0 MAX 5.5 UNIT V V V mA mA mA mA C
NOTE: 1. The 48mA limit applies only under the condition of VCC = 5.0V 5%.
1991 Feb 08
6
Philips Semiconductors
Product specification
Transceiver/register
74ALS646/74ALS646-1 74ALS648/74ALS648-1
DC ELECTRICAL CHARACTERISTICS
(Over recommended operating free-air temperature range unless otherwise noted.) SYMBOL PARAMETER TEST CONDITIONS1 VCC10%, VIL = MAX, , , VIH = MIN VCC = MIN, VIL = MAX, VIH = MIN All versions VOL Low level output Low-level out ut voltage -1 versions VIK II IIH IIL IO ICC Input clamp voltage Input current at maximum input voltage High-level input Output current4 ICCH Supply current (total) ICCL ICCZ VCC = MAX current3 control inputs A or B ports VCC = MIN, VIL = MAX, , , VIH = MIN VCC = 4.75V, VIL = MAX, VIH = MIN VCC = MIN, II = IIK VCC = MAX, VI = 7.0V VCC = MAX, VI = 5.5V VCC = MAX, VI = 2.7V VCC = MAX, VI = 0.4V VCC = MAX, VO = 2.25V -30 40 53 51 IOH = -0.4mA IOH = -3mA IOH = -15mA IOL = 12mA IOL = 24mA IOL = 48mA LIMITS MIN VCC - 2 2.4 2.0 0.25 0.35 0.35 -0.73 0.40 0.50 0.50 -1.5 0.1 0.1 20 -0.1 -112 57 78 72 3.2 TYP2 MAX UNIT V V V V V V V mA mA A mA mA mA mA mA
VOH
High level output High-level out ut voltage
Low-level input current3
NOTES: 1. For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions for the applicable type. 2. All typical values are at VCC = 5V, Tamb = 25C. 3. For I/O ports, the parameter IIH and IIL include the off-state current. 4. The output conditions have been chosen to produce a current that closely approximates one half of the true short-circuit output current, IOS.
AC ELECTRICAL CHARACTERISTICS FOR 74ALS646/74ALS646-1
LIMITS SYMBOL PARAMETER TEST CONDITION Tamb = 0C to +70C VCC = +5.0V 10% CL = 50pF, RL = 500 MIN fmax tPLH tPHL tPLH tPHL tPLH tPHL tPLH tPHL tPZH tPZL tPHZ tPLZ tPZH tPZL tPHZ tPLZ Maximum clock frequency Propagation delay CPBA to An, CPAB to Bn Propagation delay An to Bn or Bn to An Propagation delay SBA to An or SAB to Bn (A or B Low) Propagation delay SBA to An or SAB to Bn (A or B High) Output enable time OE to An or Bn Output disable time OE to An or Bn Output enable time DIR to An or Bn Output disable time DIR to An or Bn Waveform 1 Waveform 1 Waveform 2, 3 Waveform 2, 3 Waveform 2, 3 Waveform 5 Waveform 6 Waveform 5 Waveform 6 Waveform 5 Waveform 6 Waveform 5 Waveform 6 100 5.0 6.0 2.0 3.0 5.0 5.0 5.0 5.0 3.0 5.0 2.0 3.0 2.0 5.0 2.0 3.0 13.0 13.0 8.0 9.0 13.0 11.0 11.0 11.0 9.0 11.0 8.0 10.0 10.0 12.0 10.0 13.0 MAX MHz ns ns ns ns ns ns ns ns UNIT
1991 Feb 08
7
Philips Semiconductors
Product specification
Transceiver/register
74ALS646/74ALS646-1 74ALS648/74ALS648-1
AC ELECTRICAL CHARACTERISTICS FOR 74ALS648/74ALS648-1
LIMITS SYMBOL PARAMETER TEST CONDITION Tamb = 0C to +70C VCC = +5.0V 10% CL = 50pF, RL = 500 MIN fmax tPLH tPHL tPLH tPHL tPLH tPHL tPLH tPHL tPZH tPZL tPHZ tPLZ tPZH tPZL tPHZ tPLZ Maximum clock frequency Propagation delay CPBA to An, CPAB to Bn Propagation delay An to Bn or Bn to An Propagation delay SBA to An or SAB to Bn (A or B Low) Propagation delay SBA to An or SAB to Bn (A or B High) Output enable time OE to An or Bn Output disable time OE to An or Bn Output enable time DIR to An or Bn Output disable time DIR to An or Bn Waveform 1 Waveform 1 Waveform 2, 3 Waveform 2, 3 Waveform 2, 3 Waveform 5 Waveform 6 Waveform 5 Waveform 6 Waveform 5 Waveform 6 Waveform 5 Waveform 6 100 5.0 6.0 1.0 3.0 5.0 5.0 4.0 5.0 2.0 4.0 1.0 2.0 3.0 5.0 2.0 2.0 13.0 13.0 7.0 9.0 13.0 11.0 11.0 11.0 8.0 13.0 8.0 10.0 10.0 12.0 11.0 11.0 MAX MHz ns ns ns ns ns ns ns ns UNIT
AC SETUP REQUIREMENTS
LIMITS SYMBOL PARAMETER TEST CONDITION Tamb = 0C to +70C VCC = +5.0V 10% CL = 50pF, RL = 500 5.0 5.0 0.0 1.0 6.0 4.0 UNIT
tsu (H) tsu (L) th (H) th (L) tw (H) tw (L)
Setup time, High or Low An or Bn to CPAB or CPBA Hold time, High or Low An or Bn to CPAB or CPBA Pulse width, High or Low CPAB or CPBA
Waveform 4 Waveform 4 Waveform 1
ns ns ns
1991 Feb 08
8
Philips Semiconductors
Product specification
Transceiver/register
74ALS646/74ALS646-1 74ALS648/74ALS648-1
AC WAVEFORMS
For all waveforms, VM = 1.3V. The shaded areas indicate when the input is permitted to change for predictable output performance.
1/fmax CPBA or CPAB VM tw(H) tPHL VM VM tw(L) VM tPHL tPLH VM VM VM tPLH An or Bn SBA or SAB
VM
VM
An or Bn
Bn or An
An or Bn
SF00394
SF00395
Waveform 1. Propagation Delay for Clock Input to Output, Clock Pulse Width, and Maximum Clock Frequency
Waveform 2.
Propagation Delay for An to Bn or Bn to An and SAB or SBA to An or Bn
An or Bn
VM tPLH
VM tPHL VM VM
SBA or SAB
An or Bn
VM tsu(H)
VM th(H)
VM tsu(L)
VM th(L) VM
Bn or An
An or Bn
CPBA or CPAB
VM
SF00396
SF00397
Waveform 3. Propagation Delay for An to Bn or Bn to An and SAB or SBA to An or Bn
OE VM DIR tPZH An or Bn VM 0V tPHZ VOH -0.3V VM DIR OE
Waveform 4. Data Setup Time and Hold Times
VM tPZL VM
VM tPLZ
3.5V
An or Bn
SF00398
VOL +0.3V
Waveform 5. 3-State Output Enable Time to High Level and Output Disable Time from High Level
SF00399
Waveform 6. 3-State Output Enable Time to Low Level and Output Disable Time from Low Level
1991 Feb 08
9
Philips Semiconductors
Product specification
Transceiver/register
74ALS646/74ALS646-1 74ALS648/74ALS648-1
TEST CIRCUIT AND WAVEFORMS
VCC 7.0V NEGATIVE PULSE 90% VM 10% tTHL (tff) CL RL tw VM 10% tTLH (tr ) 0.3V 90% AMP (V)
VIN PULSE GENERATOR RT D.U.T.
VOUT
RL
tTLH (tr ) 90%
tTHL (tf ) AMP (V) 90% VM tw 10% 0.3V
Test Circuit for 3-State and Open Collector Outputs SWITCH POSITION TEST SWITCH closed tPLZ, tPZL open collector All other closed open
POSITIVE PULSE 10%
VM
Input Pulse Definition INPUT PULSE REQUIREMENTS Family Amplitude VM 74ALS 3.5V 1.3V Rep.Rate 1MHz tw 500ns tTLH 2.0ns tTHL 2.0ns
DEFINITIONS: RL = Load resistor; see AC electrical characteristics for value. CL = Load capacitance includes jig and probe capacitance; see AC electrical characteristics for value. RT = Termination resistance should be equal to ZOUT of pulse generators.
SC00126
1991 Feb 08
10
Philips Semiconductors
Product specification
Transceiver/register
74ALS646/74ALS646-1 74ALS648/74ALS648-1
SOT222-1
DIP24: plastic dual in-line package; 24 leads (300 mil)
1991 Feb 08
11
Philips Semiconductors
Product specification
Transceiver/register
74ALS646/74ALS646-1 74ALS648/74ALS648-1
SOT137-1
SO24: plastic small outline package; 24 leads; body width 7.5 mm
1991 Feb 08
12
Philips Semiconductors
Product specification
Transceiver/register
74ALS646/74ALS646-1 74ALS648/74ALS648-1
DEFINITIONS
Data Sheet Identification
Objective Specification
Product Status
Formative or in Design
Definition
This data sheet contains the design target or goal specifications for product development. Specifications may change in any manner without notice. This data sheet contains preliminary data, and supplementary data will be published at a later date. Philips Semiconductors reserves the right to make changes at any time without notice in order to improve design and supply the best possible product. This data sheet contains Final Specifications. Philips Semiconductors reserves the right to make changes at any time without notice, in order to improve design and supply the best possible product.
Preliminary Specification
Preproduction Product
Product Specification
Full Production
Philips Semiconductors and Philips Electronics North America Corporation reserve the right to make changes, without notice, in the products, including circuits, standard cells, and/or software, described or contained herein in order to improve design and/or performance. Philips Semiconductors assumes no responsibility or liability for the use of any of these products, conveys no license or title under any patent, copyright, or mask work right to these products, and makes no representations or warranties that these products are free from patent, copyright, or mask work right infringement, unless otherwise specified. Applications that are described herein for any of these products are for illustrative purposes only. Philips Semiconductors makes no representation or warranty that such applications will be suitable for the specified use without further testing or modification. LIFE SUPPORT APPLICATIONS Philips Semiconductors and Philips Electronics North America Corporation Products are not designed for use in life support appliances, devices, or systems where malfunction of a Philips Semiconductors and Philips Electronics North America Corporation Product can reasonably be expected to result in a personal injury. Philips Semiconductors and Philips Electronics North America Corporation customers using or selling Philips Semiconductors and Philips Electronics North America Corporation Products for use in such applications do so at their own risk and agree to fully indemnify Philips Semiconductors and Philips Electronics North America Corporation for any damages resulting from such improper use or sale. Philips Semiconductors 811 East Arques Avenue P.O. Box 3409 Sunnyvale, California 94088-3409 Telephone 800-234-7381 (c) Copyright Philips Electronics North America Corporation 1997 All rights reserved. Printed in U.S.A.
Philips Semiconductors
1991 Feb 08 13
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